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364 lines
11 KiB
C++
364 lines
11 KiB
C++
#pragma once
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#include "engine/framework/core/module.h"
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#include <cstdint>
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#include <optional>
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namespace engine::modules {
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struct Conv1dConfig {
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int64_t in_channels = 0;
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int64_t out_channels = 0;
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int64_t kernel_size = 0;
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int stride = 1;
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int padding = 0;
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int dilation = 1;
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bool use_bias = true;
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// Preserve BF16 convolution and bias rounding, with F32 graph outputs.
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bool bf16_compute = false;
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};
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struct Conv1dWeights {
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core::TensorValue weight;
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std::optional<core::TensorValue> bias;
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};
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class Conv1dModule {
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public:
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explicit Conv1dModule(Conv1dConfig config);
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const Conv1dConfig & config() const noexcept;
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const core::ModuleSchema & schema() const noexcept;
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core::TensorValue build(
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core::ModuleBuildContext & ctx,
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const core::TensorValue & input,
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const Conv1dWeights & weights) const;
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static const core::ModuleSchema & static_schema() noexcept;
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private:
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Conv1dConfig config_;
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};
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// Raw Metal fast paths on channel-fast activations (ne = [channels, frames], contiguous
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// F32) for the audio codec decoder's chained regions. Unlike the module build() methods
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// these take and return raw ggml tensors without the canonical [frames, channels]
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// orientation, so consecutive convolutions chain without paying two transposes per conv.
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// The caller owns layout conversion at region edges and causal padding.
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//
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// conv1d_pertap_channel_fast: requires padding=0, stride=1; per-tap GEMM decomposition;
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// returns [out_channels, output_frames] with bias broadcast-added when use_bias.
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ggml_tensor * conv1d_pertap_channel_fast(
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core::ModuleBuildContext & ctx,
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const Conv1dWeights & weights,
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ggml_tensor * input_cf,
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const Conv1dConfig & config);
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enum class Conv2dLayout { ChannelsFirst, ChannelsLast };
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struct Conv2dConfig {
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int64_t in_channels = 0;
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int64_t out_channels = 0;
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int64_t kernel_height = 0;
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int64_t kernel_width = 0;
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int stride_height = 1;
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int stride_width = 1;
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int padding_height = 0;
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int padding_width = 0;
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int dilation_height = 1;
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int dilation_width = 1;
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bool use_bias = true;
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bool cuda_fast_lowering = false;
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bool cuda_large_shape_lowering = false;
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bool cuda_tile_f16_accum_output_lowering = false;
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bool cuda_cudnn = false;
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bool cuda_f16_output = false;
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// Metal: FP32 per-tap GEMMs avoid materializing large im2col buffers.
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bool metal_per_tap = false;
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// Opt-in Metal F32 implicit MMA, IC divisible by 32; other cases retain the existing path.
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bool implicit_gemm = false;
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};
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struct Conv2dWeights {
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core::TensorValue weight;
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std::optional<core::TensorValue> bias;
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};
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class Conv2dModule {
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public:
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explicit Conv2dModule(Conv2dConfig config);
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Conv2dModule(Conv2dConfig config, bool cuda_cudnn, bool cuda_f16_output = false);
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Conv2dModule(Conv2dConfig config, bool cuda_cudnn, bool cuda_f16_output, bool metal_per_tap);
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const Conv2dConfig & config() const noexcept;
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const core::ModuleSchema & schema() const noexcept;
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core::TensorValue build(
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core::ModuleBuildContext & ctx,
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const core::TensorValue & input,
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const Conv2dWeights & weights) const;
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// Explicit activation layout; weight layout is unchanged. ChannelsLast uses BHWC.
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core::TensorValue build(core::ModuleBuildContext & ctx, const core::TensorValue & input,
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const Conv2dWeights & weights, Conv2dLayout layout) const;
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static const core::ModuleSchema & static_schema() noexcept;
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private:
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Conv2dConfig config_;
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};
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struct Conv3dConfig {
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int64_t in_channels = 0;
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int64_t out_channels = 0;
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int64_t kernel_depth = 0;
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int64_t kernel_height = 0;
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int64_t kernel_width = 0;
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int stride_depth = 1;
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int stride_height = 1;
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int stride_width = 1;
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int padding_depth = 0;
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int padding_height = 0;
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int padding_width = 0;
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int dilation_depth = 1;
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int dilation_height = 1;
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int dilation_width = 1;
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bool use_bias = true;
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bool cuda_fast_lowering = false;
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bool cuda_large_shape_lowering = false;
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bool cuda_tile_f16_accum_output_lowering = false;
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// Explicit cuDNN lowering: CUDA, F16 weights, F16/F32 input, F32 output by default.
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// Requires GGML_CUDA_CUDNN_CONV3D in the selected backend. No execution fallback.
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bool cuda_cudnn = false;
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// Round after optional F32 channel bias, keeping F32 storage. Requires cuda_cudnn.
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bool cuda_bf16_round = false;
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// The convolution result is F16; add optional channel bias in F32, then store F16.
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// Requires cuda_cudnn; excludes cuda_bf16_round.
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bool cuda_f16_output = false;
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// Kernel storage is already O,D,H,W,I; logical weight shape stays unchanged.
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// The caller owns packing and weight lifetime. Requires cuda_cudnn.
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bool cuda_prepacked_weights = false;
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// Replicate depth borders while packing for cuDNN. Right = 2*padding_depth-left.
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// -1 keeps ordinary zero padding. Requires cuda_cudnn.
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int cuda_replicate_depth_left = -1;
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};
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struct Conv3dWeights {
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core::TensorValue weight;
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std::optional<core::TensorValue> bias;
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};
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class Conv3dModule {
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public:
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explicit Conv3dModule(Conv3dConfig config);
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const Conv3dConfig & config() const noexcept;
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const core::ModuleSchema & schema() const noexcept;
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core::TensorValue build(
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core::ModuleBuildContext & ctx,
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const core::TensorValue & input,
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const Conv3dWeights & weights) const;
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static const core::ModuleSchema & static_schema() noexcept;
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private:
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Conv3dConfig config_;
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};
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struct CausalConv2dConfig {
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Conv2dConfig conv;
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int64_t pad_left = 0;
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int64_t pad_right = 0;
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int64_t pad_top = 0;
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int64_t pad_bottom = 0;
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};
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class CausalConv2dModule {
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public:
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explicit CausalConv2dModule(CausalConv2dConfig config);
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const CausalConv2dConfig & config() const noexcept;
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const core::ModuleSchema & schema() const noexcept;
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core::TensorValue build(
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core::ModuleBuildContext & ctx,
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const core::TensorValue & input,
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const Conv2dWeights & weights) const;
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static const core::ModuleSchema & static_schema() noexcept;
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private:
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CausalConv2dConfig config_;
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};
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struct SameWidthCausalConv2dConfig {
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int64_t in_channels = 0;
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int64_t out_channels = 0;
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int64_t kernel_size = 0;
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bool use_bias = true;
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};
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class SameWidthCausalConv2dModule {
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public:
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explicit SameWidthCausalConv2dModule(SameWidthCausalConv2dConfig config);
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const SameWidthCausalConv2dConfig & config() const noexcept;
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const core::ModuleSchema & schema() const noexcept;
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core::TensorValue build(
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core::ModuleBuildContext & ctx,
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const core::TensorValue & input,
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const Conv2dWeights & weights) const;
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static const core::ModuleSchema & static_schema() noexcept;
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private:
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SameWidthCausalConv2dConfig config_;
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};
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struct PixelNormCausalConv2dResBlockConfig {
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int64_t in_channels = 0;
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int64_t out_channels = 0;
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int64_t kernel_size = 3;
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int pixel_norm_axis = 1;
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float pixel_norm_eps = 1e-6f;
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};
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struct PixelNormCausalConv2dResBlockWeights {
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Conv2dWeights conv1;
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Conv2dWeights conv2;
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std::optional<Conv2dWeights> shortcut;
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};
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class PixelNormCausalConv2dResBlockModule {
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public:
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explicit PixelNormCausalConv2dResBlockModule(PixelNormCausalConv2dResBlockConfig config);
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const PixelNormCausalConv2dResBlockConfig & config() const noexcept;
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const core::ModuleSchema & schema() const noexcept;
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core::TensorValue build(
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core::ModuleBuildContext & ctx,
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const core::TensorValue & input,
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const PixelNormCausalConv2dResBlockWeights & weights) const;
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static const core::ModuleSchema & static_schema() noexcept;
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private:
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PixelNormCausalConv2dResBlockConfig config_;
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};
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struct CausalConv2dUpsampleConfig {
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int64_t channels = 0;
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int64_t kernel_size = 3;
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int64_t scale_height = 2;
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int64_t scale_width = 2;
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int64_t crop_top = 1;
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int64_t crop_bottom = 0;
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};
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class CausalConv2dUpsampleModule {
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public:
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explicit CausalConv2dUpsampleModule(CausalConv2dUpsampleConfig config);
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const CausalConv2dUpsampleConfig & config() const noexcept;
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const core::ModuleSchema & schema() const noexcept;
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core::TensorValue build(
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core::ModuleBuildContext & ctx,
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const core::TensorValue & input,
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const Conv2dWeights & weights) const;
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static const core::ModuleSchema & static_schema() noexcept;
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private:
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CausalConv2dUpsampleConfig config_;
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};
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struct DepthwiseConv2dConfig {
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int64_t channels = 0;
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int64_t kernel_height = 0;
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int64_t kernel_width = 0;
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int stride_height = 1;
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int stride_width = 1;
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int padding_height = 0;
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int padding_width = 0;
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int dilation_height = 1;
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int dilation_width = 1;
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bool use_bias = true;
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};
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class DepthwiseConv2dModule {
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public:
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explicit DepthwiseConv2dModule(DepthwiseConv2dConfig config);
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const DepthwiseConv2dConfig & config() const noexcept;
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const core::ModuleSchema & schema() const noexcept;
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core::TensorValue build(
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core::ModuleBuildContext & ctx,
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const core::TensorValue & input,
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const Conv2dWeights & weights) const;
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// Explicit activation layout; weight layout is unchanged. ChannelsLast uses BHWC.
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core::TensorValue build(core::ModuleBuildContext & ctx, const core::TensorValue & input,
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const Conv2dWeights & weights, Conv2dLayout layout) const;
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static const core::ModuleSchema & static_schema() noexcept;
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private:
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DepthwiseConv2dConfig config_;
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};
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struct ConvTranspose1dConfig {
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int64_t in_channels = 0;
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int64_t out_channels = 0;
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int64_t kernel_size = 0;
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int stride = 1;
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int padding = 0;
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int dilation = 1;
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bool use_bias = true;
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};
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struct ConvTranspose1dWeights {
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core::TensorValue weight;
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std::optional<core::TensorValue> bias;
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std::optional<core::TensorValue> col2im_matrix = std::nullopt;
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};
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bool is_conv_transpose1d_col2im_fast_path_eligible(
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const core::ModuleBuildContext & ctx,
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const ConvTranspose1dConfig & config) noexcept;
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// conv_transpose1d_col2im_channel_fast: same col2im math as ConvTranspose1dModule's fast
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// path but consumes channel-fast input directly (skipping its internal transpose) and
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// returns the raw time-fast [frames_out, out_channels] tensor with bias included; the
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// caller owns causal trimming and layout conversion.
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ggml_tensor * conv_transpose1d_col2im_channel_fast(
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core::ModuleBuildContext & ctx,
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const ConvTranspose1dWeights & weights,
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ggml_tensor * input_cf,
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const ConvTranspose1dConfig & config);
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class ConvTranspose1dModule {
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public:
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explicit ConvTranspose1dModule(ConvTranspose1dConfig config);
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const ConvTranspose1dConfig & config() const noexcept;
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const core::ModuleSchema & schema() const noexcept;
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core::TensorValue build(
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core::ModuleBuildContext & ctx,
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const core::TensorValue & input,
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const ConvTranspose1dWeights & weights) const;
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static const core::ModuleSchema & static_schema() noexcept;
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private:
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ConvTranspose1dConfig config_;
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};
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} // namespace engine::modules
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