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7 changed files with 82 additions and 41 deletions
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@ -8,6 +8,8 @@
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#ifndef __SOUND_HDA_AUTO_PARSER_H
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#define __SOUND_HDA_AUTO_PARSER_H
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#include "hda_local.h"
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/*
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* Helper for automatic pin configuration
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*/
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@ -35,6 +37,7 @@ struct auto_pin_cfg_item {
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unsigned int is_headset_mic:1;
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unsigned int is_headphone_mic:1; /* Mic-only in headphone jack */
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unsigned int has_boost_on_pin:1;
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int order;
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};
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struct auto_pin_cfg;
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@ -9,6 +9,9 @@
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#define __SOUND_HDA_GENERIC_H
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#include <linux/leds.h>
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#include "hda_auto_parser.h"
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struct hda_jack_callback;
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/* table entry for multi-io paths */
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struct hda_multi_io {
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@ -229,7 +232,6 @@ struct hda_gen_spec {
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unsigned int power_down_unused:1; /* power down unused widgets */
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unsigned int dac_min_mute:1; /* minimal = mute for DACs */
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unsigned int suppress_vmaster:1; /* don't create vmaster kctls */
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unsigned int obey_preferred_dacs:1; /* obey preferred_dacs assignment */
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/* other internal flags */
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unsigned int no_analog:1; /* digital I/O only */
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@ -337,9 +339,7 @@ void snd_hda_gen_mic_autoswitch(struct hda_codec *codec,
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struct hda_jack_callback *jack);
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void snd_hda_gen_update_outputs(struct hda_codec *codec);
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#ifdef CONFIG_PM
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int snd_hda_gen_check_power_status(struct hda_codec *codec, hda_nid_t nid);
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#endif
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unsigned int snd_hda_gen_path_power_filter(struct hda_codec *codec,
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hda_nid_t nid,
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unsigned int power_state);
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@ -352,5 +352,6 @@ int snd_hda_gen_add_mute_led_cdev(struct hda_codec *codec,
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int snd_hda_gen_add_micmute_led_cdev(struct hda_codec *codec,
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int (*callback)(struct led_classdev *,
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enum led_brightness));
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bool snd_hda_gen_shutup_speakers(struct hda_codec *codec);
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#endif /* __SOUND_HDA_GENERIC_H */
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31
hda_local.h
31
hda_local.h
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@ -292,6 +292,32 @@ struct hda_fixup {
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} v;
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};
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/*
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* extended form of snd_pci_quirk:
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* for PCI SSID matching, use SND_PCI_QUIRK() like before;
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* for codec SSID matching, use the new HDA_CODEC_QUIRK() instead
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*/
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struct hda_quirk {
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unsigned short subvendor; /* PCI subvendor ID */
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unsigned short subdevice; /* PCI subdevice ID */
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unsigned short subdevice_mask; /* bitmask to match */
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bool match_codec_ssid; /* match only with codec SSID */
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int value; /* value */
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#ifdef CONFIG_SND_DEBUG_VERBOSE
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const char *name; /* name of the device (optional) */
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#endif
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};
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#ifdef CONFIG_SND_DEBUG_VERBOSE
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#define HDA_CODEC_QUIRK(vend, dev, xname, val) \
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{ _SND_PCI_QUIRK_ID(vend, dev), .value = (val), .name = (xname),\
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.match_codec_ssid = true }
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#else
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#define HDA_CODEC_QUIRK(vend, dev, xname, val) \
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{ _SND_PCI_QUIRK_ID(vend, dev), .value = (val), \
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.match_codec_ssid = true }
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#endif
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struct snd_hda_pin_quirk {
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unsigned int codec; /* Codec vendor/device ID */
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unsigned short subvendor; /* PCI subvendor ID */
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@ -351,7 +377,7 @@ void snd_hda_apply_fixup(struct hda_codec *codec, int action);
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void __snd_hda_apply_fixup(struct hda_codec *codec, int id, int action, int depth);
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void snd_hda_pick_fixup(struct hda_codec *codec,
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const struct hda_model_fixup *models,
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const struct snd_pci_quirk *quirk,
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const struct hda_quirk *quirk,
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const struct hda_fixup *fixlist);
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void snd_hda_pick_pin_fixup(struct hda_codec *codec,
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const struct snd_hda_pin_quirk *pin_quirk,
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@ -712,7 +738,8 @@ int snd_hdmi_get_eld_ati(struct hda_codec *codec, hda_nid_t nid,
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#ifdef CONFIG_SND_PROC_FS
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void snd_hdmi_print_eld_info(struct hdmi_eld *eld,
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struct snd_info_buffer *buffer);
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struct snd_info_buffer *buffer,
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hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid);
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void snd_hdmi_write_eld_info(struct hdmi_eld *eld,
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struct snd_info_buffer *buffer);
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#endif
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@ -340,6 +340,8 @@ add_control(struct hda_gen_spec *spec, int type, const char *name,
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knew->index = cidx;
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if (get_amp_nid_(val))
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knew->subdevice = HDA_SUBDEV_AMP_FLAG;
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if (knew->access == 0)
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knew->access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
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knew->private_value = val;
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return knew;
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}
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@ -350,7 +352,11 @@ static int add_control_with_pfx(struct hda_gen_spec *spec, int type,
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const char *sfx, int cidx, unsigned long val)
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{
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char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
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snprintf(name, sizeof(name), "%s %s %s", pfx, dir, sfx);
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int len;
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len = snprintf(name, sizeof(name), "%s %s %s", pfx, dir, sfx);
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if (snd_BUG_ON(len >= sizeof(name)))
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return -EINVAL;
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if (!add_control(spec, type, name, cidx, val))
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return -ENOMEM;
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return 0;
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@ -68,7 +68,7 @@ const struct hda_verb cs8409_cs42l42_init_verbs[] = {
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{} /* terminator */
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};
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const struct hda_pintbl cs8409_cs42l42_pincfgs[] = {
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static const struct hda_pintbl cs8409_cs42l42_pincfgs[] = {
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{ CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */
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{ CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */
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{ CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */
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@ -76,7 +76,7 @@ const struct hda_pintbl cs8409_cs42l42_pincfgs[] = {
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{} /* terminator */
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};
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const struct hda_pintbl cs8409_cs42l42_pincfgs_no_dmic[] = {
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static const struct hda_pintbl cs8409_cs42l42_pincfgs_no_dmic[] = {
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{ CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */
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{ CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */
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{ CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */
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@ -121,7 +121,7 @@ static const struct cs8409_i2c_param cs42l42_init_reg_seq[] = {
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{ CS42L42_MIXER_CHA_VOL, 0x3F },
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{ CS42L42_MIXER_CHB_VOL, 0x3F },
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{ CS42L42_MIXER_ADC_VOL, 0x3f },
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{ CS42L42_HP_CTL, 0x03 },
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{ CS42L42_HP_CTL, 0x0D },
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{ CS42L42_MIC_DET_CTL1, 0xB6 },
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{ CS42L42_TIPSENSE_CTL, 0xC2 },
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{ CS42L42_HS_CLAMP_DISABLE, 0x01 },
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@ -131,7 +131,7 @@ static const struct cs8409_i2c_param cs42l42_init_reg_seq[] = {
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{ CS42L42_RSENSE_CTL3, 0x00 },
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{ CS42L42_TSENSE_CTL, 0x80 },
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{ CS42L42_HS_BIAS_CTL, 0xC0 },
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{ CS42L42_PWR_CTL1, 0x02 },
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{ CS42L42_PWR_CTL1, 0x02, 10000 },
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{ CS42L42_ADC_OVFL_INT_MASK, 0xff },
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{ CS42L42_MIXER_INT_MASK, 0xff },
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{ CS42L42_SRC_INT_MASK, 0xff },
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@ -279,7 +279,7 @@ const struct hda_verb dolphin_init_verbs[] = {
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{} /* terminator */
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};
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const struct hda_pintbl dolphin_pincfgs[] = {
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static const struct hda_pintbl dolphin_pincfgs[] = {
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{ 0x24, 0x022210f0 }, /* ASP-1-TX-A */
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{ 0x25, 0x010240f0 }, /* ASP-1-TX-B */
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{ 0x34, 0x02a21050 }, /* ASP-1-RX */
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@ -315,7 +315,7 @@ static const struct cs8409_i2c_param dolphin_c0_init_reg_seq[] = {
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{ CS42L42_ASP_TX_SZ_EN, 0x01 },
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{ CS42L42_PWR_CTL1, 0x0A },
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{ CS42L42_PWR_CTL2, 0x84 },
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{ CS42L42_HP_CTL, 0x03 },
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{ CS42L42_HP_CTL, 0x0D },
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{ CS42L42_MIXER_CHA_VOL, 0x3F },
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{ CS42L42_MIXER_CHB_VOL, 0x3F },
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{ CS42L42_MIXER_ADC_VOL, 0x3f },
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@ -328,7 +328,7 @@ static const struct cs8409_i2c_param dolphin_c0_init_reg_seq[] = {
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{ CS42L42_RSENSE_CTL3, 0x00 },
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{ CS42L42_TSENSE_CTL, 0x80 },
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{ CS42L42_HS_BIAS_CTL, 0xC0 },
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{ CS42L42_PWR_CTL1, 0x02 },
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{ CS42L42_PWR_CTL1, 0x02, 10000 },
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{ CS42L42_ADC_OVFL_INT_MASK, 0xff },
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{ CS42L42_MIXER_INT_MASK, 0xff },
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{ CS42L42_SRC_INT_MASK, 0xff },
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@ -371,7 +371,7 @@ static const struct cs8409_i2c_param dolphin_c1_init_reg_seq[] = {
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{ CS42L42_ASP_TX_SZ_EN, 0x00 },
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{ CS42L42_PWR_CTL1, 0x0E },
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{ CS42L42_PWR_CTL2, 0x84 },
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{ CS42L42_HP_CTL, 0x01 },
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{ CS42L42_HP_CTL, 0x0D },
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{ CS42L42_MIXER_CHA_VOL, 0x3F },
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{ CS42L42_MIXER_CHB_VOL, 0x3F },
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{ CS42L42_MIXER_ADC_VOL, 0x3f },
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@ -384,7 +384,7 @@ static const struct cs8409_i2c_param dolphin_c1_init_reg_seq[] = {
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{ CS42L42_RSENSE_CTL3, 0x00 },
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{ CS42L42_TSENSE_CTL, 0x80 },
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{ CS42L42_HS_BIAS_CTL, 0xC0 },
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{ CS42L42_PWR_CTL1, 0x06 },
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{ CS42L42_PWR_CTL1, 0x06, 10000 },
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{ CS42L42_ADC_OVFL_INT_MASK, 0xff },
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{ CS42L42_MIXER_INT_MASK, 0xff },
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{ CS42L42_SRC_INT_MASK, 0xff },
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@ -473,7 +473,7 @@ struct sub_codec dolphin_cs42l42_1 = {
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* Arrays Used for all projects using CS8409
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******************************************************************************/
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const struct snd_pci_quirk cs8409_fixup_tbl[] = {
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const struct hda_quirk cs8409_fixup_tbl[] = {
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SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE),
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SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE),
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SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE),
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@ -550,6 +550,10 @@ const struct snd_pci_quirk cs8409_fixup_tbl[] = {
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SND_PCI_QUIRK(0x1028, 0x0C50, "Dolphin", CS8409_DOLPHIN),
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SND_PCI_QUIRK(0x1028, 0x0C51, "Dolphin", CS8409_DOLPHIN),
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SND_PCI_QUIRK(0x1028, 0x0C52, "Dolphin", CS8409_DOLPHIN),
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SND_PCI_QUIRK(0x1028, 0x0C73, "Dolphin", CS8409_DOLPHIN),
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SND_PCI_QUIRK(0x1028, 0x0C75, "Dolphin", CS8409_DOLPHIN),
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SND_PCI_QUIRK(0x1028, 0x0C7D, "Dolphin", CS8409_DOLPHIN),
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SND_PCI_QUIRK(0x1028, 0x0C7F, "Dolphin", CS8409_DOLPHIN),
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{} /* terminator */
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};
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@ -346,6 +346,11 @@ static int cs8409_i2c_bulk_write(struct sub_codec *scodec, const struct cs8409_i
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if (cs8409_i2c_wait_complete(codec) < 0)
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goto error;
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/* Certain use cases may require a delay
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* after a write operation before proceeding.
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*/
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if (seq[i].delay)
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fsleep(seq[i].delay);
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}
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mutex_unlock(&spec->i2c_mux);
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@ -876,7 +881,7 @@ static void cs42l42_resume(struct sub_codec *cs42l42)
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{ CS42L42_DET_INT_STATUS2, 0x00 },
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{ CS42L42_TSRS_PLUG_STATUS, 0x00 },
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};
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int fsv_old, fsv_new;
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unsigned int fsv;
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/* Bring CS42L42 out of Reset */
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spec->gpio_data = snd_hda_codec_read(codec, CS8409_PIN_AFG, 0, AC_VERB_GET_GPIO_DATA, 0);
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@ -888,18 +893,19 @@ static void cs42l42_resume(struct sub_codec *cs42l42)
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/* Initialize CS42L42 companion codec */
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cs8409_i2c_bulk_write(cs42l42, cs42l42->init_seq, cs42l42->init_seq_num);
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usleep_range(20000, 25000);
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/* Clear interrupts, by reading interrupt status registers */
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cs8409_i2c_bulk_read(cs42l42, irq_regs, ARRAY_SIZE(irq_regs));
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fsv_old = cs8409_i2c_read(cs42l42, CS42L42_HP_CTL);
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if (cs42l42->full_scale_vol == CS42L42_FULL_SCALE_VOL_0DB)
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fsv_new = fsv_old & ~CS42L42_FULL_SCALE_VOL_MASK;
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else
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fsv_new = fsv_old & CS42L42_FULL_SCALE_VOL_MASK;
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if (fsv_new != fsv_old)
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cs8409_i2c_write(cs42l42, CS42L42_HP_CTL, fsv_new);
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fsv = cs8409_i2c_read(cs42l42, CS42L42_HP_CTL);
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if (cs42l42->full_scale_vol) {
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// Set the full scale volume bit
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fsv |= CS42L42_FULL_SCALE_VOL_MASK;
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cs8409_i2c_write(cs42l42, CS42L42_HP_CTL, fsv);
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}
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// Unmute analog channels A and B
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fsv = (fsv & ~CS42L42_ANA_MUTE_AB);
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cs8409_i2c_write(cs42l42, CS42L42_HP_CTL, fsv);
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/* we have to explicitly allow unsol event handling even during the
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* resume phase so that the jack event is processed properly
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@ -909,7 +915,6 @@ static void cs42l42_resume(struct sub_codec *cs42l42)
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cs42l42_enable_jack_detect(cs42l42);
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}
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#ifdef CONFIG_PM
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static void cs42l42_suspend(struct sub_codec *cs42l42)
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{
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struct hda_codec *codec = cs42l42->codec;
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@ -921,7 +926,7 @@ static void cs42l42_suspend(struct sub_codec *cs42l42)
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{ CS42L42_MIXER_CHA_VOL, 0x3F },
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{ CS42L42_MIXER_ADC_VOL, 0x3F },
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{ CS42L42_MIXER_CHB_VOL, 0x3F },
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{ CS42L42_HP_CTL, 0x0F },
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{ CS42L42_HP_CTL, 0x0D },
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{ CS42L42_ASP_RX_DAI0_EN, 0x00 },
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{ CS42L42_ASP_CLK_CFG, 0x00 },
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{ CS42L42_PWR_CTL1, 0xFE },
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@ -948,7 +953,6 @@ static void cs42l42_suspend(struct sub_codec *cs42l42)
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spec->gpio_data &= ~cs42l42->reset_gpio;
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snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, spec->gpio_data);
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}
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#endif
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static void cs8409_free(struct hda_codec *codec)
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{
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@ -1003,7 +1007,6 @@ static void cs8409_cs42l42_jack_unsol_event(struct hda_codec *codec, unsigned in
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}
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}
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#ifdef CONFIG_PM
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/* Manage PDREF, when transition to D3hot */
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static int cs8409_cs42l42_suspend(struct hda_codec *codec)
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{
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@ -1025,7 +1028,6 @@ static int cs8409_cs42l42_suspend(struct hda_codec *codec)
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return 0;
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}
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#endif
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/* Vendor specific HW configuration
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* PLL, ASP, I2C, SPI, GPIOs, DMIC etc...
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@ -1080,9 +1082,7 @@ static const struct hda_codec_ops cs8409_cs42l42_patch_ops = {
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.init = cs8409_init,
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.free = cs8409_free,
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.unsol_event = cs8409_cs42l42_jack_unsol_event,
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#ifdef CONFIG_PM
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.suspend = cs8409_cs42l42_suspend,
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#endif
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};
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static int cs8409_cs42l42_exec_verb(struct hdac_device *dev, unsigned int cmd, unsigned int flags,
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@ -1310,9 +1310,7 @@ static const struct hda_codec_ops cs8409_dolphin_patch_ops = {
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.init = cs8409_init,
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.free = cs8409_free,
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.unsol_event = dolphin_jack_unsol_event,
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#ifdef CONFIG_PM
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.suspend = cs8409_cs42l42_suspend,
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#endif
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};
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|
||||
static int dolphin_exec_verb(struct hdac_device *dev, unsigned int cmd, unsigned int flags,
|
||||
|
|
@ -1371,6 +1369,7 @@ void dolphin_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int ac
|
|||
spec->scodecs[CS8409_CODEC1] = &dolphin_cs42l42_1;
|
||||
spec->scodecs[CS8409_CODEC1]->codec = codec;
|
||||
spec->num_scodecs = 2;
|
||||
spec->gen.suppress_vmaster = 1;
|
||||
|
||||
codec->patch_ops = cs8409_dolphin_patch_ops;
|
||||
|
||||
|
|
@ -1410,8 +1409,9 @@ void dolphin_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int ac
|
|||
kctrl = snd_hda_gen_add_kctl(&spec->gen, "Line Out Playback Volume",
|
||||
&cs42l42_dac_volume_mixer);
|
||||
/* Update Line Out kcontrol template */
|
||||
kctrl->private_value = HDA_COMPOSE_AMP_VAL_OFS(DOLPHIN_HP_PIN_NID, 3, CS8409_CODEC1,
|
||||
HDA_OUTPUT, CS42L42_VOL_DAC) | HDA_AMP_VAL_MIN_MUTE;
|
||||
if (kctrl)
|
||||
kctrl->private_value = HDA_COMPOSE_AMP_VAL_OFS(DOLPHIN_HP_PIN_NID, 3, CS8409_CODEC1,
|
||||
HDA_OUTPUT, CS42L42_VOL_DAC) | HDA_AMP_VAL_MIN_MUTE;
|
||||
cs8409_enable_ur(codec, 0);
|
||||
snd_hda_codec_set_name(codec, "CS8409/CS42L42");
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -229,9 +229,10 @@ enum cs8409_coefficient_index_registers {
|
|||
#define CS42L42_I2C_SLEEP_US (2000)
|
||||
#define CS42L42_PDN_TIMEOUT_US (250000)
|
||||
#define CS42L42_PDN_SLEEP_US (2000)
|
||||
#define CS42L42_ANA_MUTE_AB (0x0C)
|
||||
#define CS42L42_FULL_SCALE_VOL_MASK (2)
|
||||
#define CS42L42_FULL_SCALE_VOL_0DB (1)
|
||||
#define CS42L42_FULL_SCALE_VOL_MINUS6DB (0)
|
||||
#define CS42L42_FULL_SCALE_VOL_0DB (0)
|
||||
#define CS42L42_FULL_SCALE_VOL_MINUS6DB (1)
|
||||
|
||||
/* Dell BULLSEYE / WARLOCK / CYBORG Specific Definitions */
|
||||
|
||||
|
|
@ -289,6 +290,7 @@ enum {
|
|||
struct cs8409_i2c_param {
|
||||
unsigned int addr;
|
||||
unsigned int value;
|
||||
unsigned int delay;
|
||||
};
|
||||
|
||||
struct cs8409_cir_param {
|
||||
|
|
@ -494,17 +496,15 @@ int cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uc
|
|||
|
||||
extern const struct hda_pcm_stream cs42l42_48k_pcm_analog_playback;
|
||||
extern const struct hda_pcm_stream cs42l42_48k_pcm_analog_capture;
|
||||
extern const struct snd_pci_quirk cs8409_fixup_tbl[];
|
||||
extern const struct hda_quirk cs8409_fixup_tbl[];
|
||||
extern const struct hda_model_fixup cs8409_models[];
|
||||
extern const struct hda_fixup cs8409_fixups[];
|
||||
extern const struct hda_verb cs8409_cs42l42_init_verbs[];
|
||||
extern const struct hda_pintbl cs8409_cs42l42_pincfgs[];
|
||||
extern const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[];
|
||||
extern const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[];
|
||||
extern struct sub_codec cs8409_cs42l42_codec;
|
||||
|
||||
extern const struct hda_verb dolphin_init_verbs[];
|
||||
extern const struct hda_pintbl dolphin_pincfgs[];
|
||||
extern const struct cs8409_cir_param dolphin_hw_cfg[];
|
||||
extern struct sub_codec dolphin_cs42l42_0;
|
||||
extern struct sub_codec dolphin_cs42l42_1;
|
||||
|
|
|
|||
Loading…
Reference in a new issue