Fabio/snd-hda-codec-cs8409
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linux5.19 ... master

7 changed files with 82 additions and 41 deletions
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3
hda_auto_parser.h
View file

@ -8,6 +8,8 @@
#ifndef __SOUND_HDA_AUTO_PARSER_H #ifndef __SOUND_HDA_AUTO_PARSER_H
#define __SOUND_HDA_AUTO_PARSER_H #define __SOUND_HDA_AUTO_PARSER_H
#include "hda_local.h"
/* /*
* Helper for automatic pin configuration * Helper for automatic pin configuration
*/ */
@ -35,6 +37,7 @@ struct auto_pin_cfg_item {
unsigned int is_headset_mic:1; unsigned int is_headset_mic:1;
unsigned int is_headphone_mic:1; /* Mic-only in headphone jack */ unsigned int is_headphone_mic:1; /* Mic-only in headphone jack */
unsigned int has_boost_on_pin:1; unsigned int has_boost_on_pin:1;
int order;
}; };
struct auto_pin_cfg; struct auto_pin_cfg;

7
hda_generic.h
View file

@ -9,6 +9,9 @@
#define __SOUND_HDA_GENERIC_H #define __SOUND_HDA_GENERIC_H
#include <linux/leds.h> #include <linux/leds.h>
#include "hda_auto_parser.h"
struct hda_jack_callback;
/* table entry for multi-io paths */ /* table entry for multi-io paths */
struct hda_multi_io { struct hda_multi_io {
@ -229,7 +232,6 @@ struct hda_gen_spec {
unsigned int power_down_unused:1; /* power down unused widgets */ unsigned int power_down_unused:1; /* power down unused widgets */
unsigned int dac_min_mute:1; /* minimal = mute for DACs */ unsigned int dac_min_mute:1; /* minimal = mute for DACs */
unsigned int suppress_vmaster:1; /* don't create vmaster kctls */ unsigned int suppress_vmaster:1; /* don't create vmaster kctls */
unsigned int obey_preferred_dacs:1; /* obey preferred_dacs assignment */
/* other internal flags */ /* other internal flags */
unsigned int no_analog:1; /* digital I/O only */ unsigned int no_analog:1; /* digital I/O only */
@ -337,9 +339,7 @@ void snd_hda_gen_mic_autoswitch(struct hda_codec *codec,
struct hda_jack_callback *jack); struct hda_jack_callback *jack);
void snd_hda_gen_update_outputs(struct hda_codec *codec); void snd_hda_gen_update_outputs(struct hda_codec *codec);
#ifdef CONFIG_PM
int snd_hda_gen_check_power_status(struct hda_codec *codec, hda_nid_t nid); int snd_hda_gen_check_power_status(struct hda_codec *codec, hda_nid_t nid);
#endif
unsigned int snd_hda_gen_path_power_filter(struct hda_codec *codec, unsigned int snd_hda_gen_path_power_filter(struct hda_codec *codec,
hda_nid_t nid, hda_nid_t nid,
unsigned int power_state); unsigned int power_state);
@ -352,5 +352,6 @@ int snd_hda_gen_add_mute_led_cdev(struct hda_codec *codec,
int snd_hda_gen_add_micmute_led_cdev(struct hda_codec *codec, int snd_hda_gen_add_micmute_led_cdev(struct hda_codec *codec,
int (*callback)(struct led_classdev *, int (*callback)(struct led_classdev *,
enum led_brightness)); enum led_brightness));
bool snd_hda_gen_shutup_speakers(struct hda_codec *codec);
#endif /* __SOUND_HDA_GENERIC_H */ #endif /* __SOUND_HDA_GENERIC_H */

31
hda_local.h
View file

@ -292,6 +292,32 @@ struct hda_fixup {
} v; } v;
}; };
/*
* extended form of snd_pci_quirk:
* for PCI SSID matching, use SND_PCI_QUIRK() like before;
* for codec SSID matching, use the new HDA_CODEC_QUIRK() instead
*/
struct hda_quirk {
unsigned short subvendor; /* PCI subvendor ID */
unsigned short subdevice; /* PCI subdevice ID */
unsigned short subdevice_mask; /* bitmask to match */
bool match_codec_ssid; /* match only with codec SSID */
int value; /* value */
#ifdef CONFIG_SND_DEBUG_VERBOSE
const char *name; /* name of the device (optional) */
#endif
};
#ifdef CONFIG_SND_DEBUG_VERBOSE
#define HDA_CODEC_QUIRK(vend, dev, xname, val) \
{ _SND_PCI_QUIRK_ID(vend, dev), .value = (val), .name = (xname),\
.match_codec_ssid = true }
#else
#define HDA_CODEC_QUIRK(vend, dev, xname, val) \
{ _SND_PCI_QUIRK_ID(vend, dev), .value = (val), \
.match_codec_ssid = true }
#endif
struct snd_hda_pin_quirk { struct snd_hda_pin_quirk {
unsigned int codec; /* Codec vendor/device ID */ unsigned int codec; /* Codec vendor/device ID */
unsigned short subvendor; /* PCI subvendor ID */ unsigned short subvendor; /* PCI subvendor ID */
@ -351,7 +377,7 @@ void snd_hda_apply_fixup(struct hda_codec *codec, int action);
void __snd_hda_apply_fixup(struct hda_codec *codec, int id, int action, int depth); void __snd_hda_apply_fixup(struct hda_codec *codec, int id, int action, int depth);
void snd_hda_pick_fixup(struct hda_codec *codec, void snd_hda_pick_fixup(struct hda_codec *codec,
const struct hda_model_fixup *models, const struct hda_model_fixup *models,
const struct snd_pci_quirk *quirk, const struct hda_quirk *quirk,
const struct hda_fixup *fixlist); const struct hda_fixup *fixlist);
void snd_hda_pick_pin_fixup(struct hda_codec *codec, void snd_hda_pick_pin_fixup(struct hda_codec *codec,
const struct snd_hda_pin_quirk *pin_quirk, const struct snd_hda_pin_quirk *pin_quirk,
@ -712,7 +738,8 @@ int snd_hdmi_get_eld_ati(struct hda_codec *codec, hda_nid_t nid,
#ifdef CONFIG_SND_PROC_FS #ifdef CONFIG_SND_PROC_FS
void snd_hdmi_print_eld_info(struct hdmi_eld *eld, void snd_hdmi_print_eld_info(struct hdmi_eld *eld,
struct snd_info_buffer *buffer); struct snd_info_buffer *buffer,
hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid);
void snd_hdmi_write_eld_info(struct hdmi_eld *eld, void snd_hdmi_write_eld_info(struct hdmi_eld *eld,
struct snd_info_buffer *buffer); struct snd_info_buffer *buffer);
#endif #endif

8
patch_cirrus_hda_generic_copy.h
View file

@ -340,6 +340,8 @@ add_control(struct hda_gen_spec *spec, int type, const char *name,
knew->index = cidx; knew->index = cidx;
if (get_amp_nid_(val)) if (get_amp_nid_(val))
knew->subdevice = HDA_SUBDEV_AMP_FLAG; knew->subdevice = HDA_SUBDEV_AMP_FLAG;
if (knew->access == 0)
knew->access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
knew->private_value = val; knew->private_value = val;
return knew; return knew;
} }
@ -350,7 +352,11 @@ static int add_control_with_pfx(struct hda_gen_spec *spec, int type,
const char *sfx, int cidx, unsigned long val) const char *sfx, int cidx, unsigned long val)
{ {
char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
snprintf(name, sizeof(name), "%s %s %s", pfx, dir, sfx); int len;
len = snprintf(name, sizeof(name), "%s %s %s", pfx, dir, sfx);
if (snd_BUG_ON(len >= sizeof(name)))
return -EINVAL;
if (!add_control(spec, type, name, cidx, val)) if (!add_control(spec, type, name, cidx, val))
return -ENOMEM; return -ENOMEM;
return 0; return 0;

24
patch_cs8409-tables.c
View file

@ -68,7 +68,7 @@ const struct hda_verb cs8409_cs42l42_init_verbs[] = {
{} /* terminator */ {} /* terminator */
}; };
const struct hda_pintbl cs8409_cs42l42_pincfgs[] = { static const struct hda_pintbl cs8409_cs42l42_pincfgs[] = {
{ CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */ { CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */
{ CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */ { CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */
{ CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */ { CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */
@ -76,7 +76,7 @@ const struct hda_pintbl cs8409_cs42l42_pincfgs[] = {
{} /* terminator */ {} /* terminator */
}; };
const struct hda_pintbl cs8409_cs42l42_pincfgs_no_dmic[] = { static const struct hda_pintbl cs8409_cs42l42_pincfgs_no_dmic[] = {
{ CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */ { CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */
{ CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */ { CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */
{ CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */ { CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */
@ -121,7 +121,7 @@ static const struct cs8409_i2c_param cs42l42_init_reg_seq[] = {
{ CS42L42_MIXER_CHA_VOL, 0x3F }, { CS42L42_MIXER_CHA_VOL, 0x3F },
{ CS42L42_MIXER_CHB_VOL, 0x3F }, { CS42L42_MIXER_CHB_VOL, 0x3F },
{ CS42L42_MIXER_ADC_VOL, 0x3f }, { CS42L42_MIXER_ADC_VOL, 0x3f },
{ CS42L42_HP_CTL, 0x03 }, { CS42L42_HP_CTL, 0x0D },
{ CS42L42_MIC_DET_CTL1, 0xB6 }, { CS42L42_MIC_DET_CTL1, 0xB6 },
{ CS42L42_TIPSENSE_CTL, 0xC2 }, { CS42L42_TIPSENSE_CTL, 0xC2 },
{ CS42L42_HS_CLAMP_DISABLE, 0x01 }, { CS42L42_HS_CLAMP_DISABLE, 0x01 },
@ -131,7 +131,7 @@ static const struct cs8409_i2c_param cs42l42_init_reg_seq[] = {
{ CS42L42_RSENSE_CTL3, 0x00 }, { CS42L42_RSENSE_CTL3, 0x00 },
{ CS42L42_TSENSE_CTL, 0x80 }, { CS42L42_TSENSE_CTL, 0x80 },
{ CS42L42_HS_BIAS_CTL, 0xC0 }, { CS42L42_HS_BIAS_CTL, 0xC0 },
{ CS42L42_PWR_CTL1, 0x02 }, { CS42L42_PWR_CTL1, 0x02, 10000 },
{ CS42L42_ADC_OVFL_INT_MASK, 0xff }, { CS42L42_ADC_OVFL_INT_MASK, 0xff },
{ CS42L42_MIXER_INT_MASK, 0xff }, { CS42L42_MIXER_INT_MASK, 0xff },
{ CS42L42_SRC_INT_MASK, 0xff }, { CS42L42_SRC_INT_MASK, 0xff },
@ -279,7 +279,7 @@ const struct hda_verb dolphin_init_verbs[] = {
{} /* terminator */ {} /* terminator */
}; };
const struct hda_pintbl dolphin_pincfgs[] = { static const struct hda_pintbl dolphin_pincfgs[] = {
{ 0x24, 0x022210f0 }, /* ASP-1-TX-A */ { 0x24, 0x022210f0 }, /* ASP-1-TX-A */
{ 0x25, 0x010240f0 }, /* ASP-1-TX-B */ { 0x25, 0x010240f0 }, /* ASP-1-TX-B */
{ 0x34, 0x02a21050 }, /* ASP-1-RX */ { 0x34, 0x02a21050 }, /* ASP-1-RX */
@ -315,7 +315,7 @@ static const struct cs8409_i2c_param dolphin_c0_init_reg_seq[] = {
{ CS42L42_ASP_TX_SZ_EN, 0x01 }, { CS42L42_ASP_TX_SZ_EN, 0x01 },
{ CS42L42_PWR_CTL1, 0x0A }, { CS42L42_PWR_CTL1, 0x0A },
{ CS42L42_PWR_CTL2, 0x84 }, { CS42L42_PWR_CTL2, 0x84 },
{ CS42L42_HP_CTL, 0x03 }, { CS42L42_HP_CTL, 0x0D },
{ CS42L42_MIXER_CHA_VOL, 0x3F }, { CS42L42_MIXER_CHA_VOL, 0x3F },
{ CS42L42_MIXER_CHB_VOL, 0x3F }, { CS42L42_MIXER_CHB_VOL, 0x3F },
{ CS42L42_MIXER_ADC_VOL, 0x3f }, { CS42L42_MIXER_ADC_VOL, 0x3f },
@ -328,7 +328,7 @@ static const struct cs8409_i2c_param dolphin_c0_init_reg_seq[] = {
{ CS42L42_RSENSE_CTL3, 0x00 }, { CS42L42_RSENSE_CTL3, 0x00 },
{ CS42L42_TSENSE_CTL, 0x80 }, { CS42L42_TSENSE_CTL, 0x80 },
{ CS42L42_HS_BIAS_CTL, 0xC0 }, { CS42L42_HS_BIAS_CTL, 0xC0 },
{ CS42L42_PWR_CTL1, 0x02 }, { CS42L42_PWR_CTL1, 0x02, 10000 },
{ CS42L42_ADC_OVFL_INT_MASK, 0xff }, { CS42L42_ADC_OVFL_INT_MASK, 0xff },
{ CS42L42_MIXER_INT_MASK, 0xff }, { CS42L42_MIXER_INT_MASK, 0xff },
{ CS42L42_SRC_INT_MASK, 0xff }, { CS42L42_SRC_INT_MASK, 0xff },
@ -371,7 +371,7 @@ static const struct cs8409_i2c_param dolphin_c1_init_reg_seq[] = {
{ CS42L42_ASP_TX_SZ_EN, 0x00 }, { CS42L42_ASP_TX_SZ_EN, 0x00 },
{ CS42L42_PWR_CTL1, 0x0E }, { CS42L42_PWR_CTL1, 0x0E },
{ CS42L42_PWR_CTL2, 0x84 }, { CS42L42_PWR_CTL2, 0x84 },
{ CS42L42_HP_CTL, 0x01 }, { CS42L42_HP_CTL, 0x0D },
{ CS42L42_MIXER_CHA_VOL, 0x3F }, { CS42L42_MIXER_CHA_VOL, 0x3F },
{ CS42L42_MIXER_CHB_VOL, 0x3F }, { CS42L42_MIXER_CHB_VOL, 0x3F },
{ CS42L42_MIXER_ADC_VOL, 0x3f }, { CS42L42_MIXER_ADC_VOL, 0x3f },
@ -384,7 +384,7 @@ static const struct cs8409_i2c_param dolphin_c1_init_reg_seq[] = {
{ CS42L42_RSENSE_CTL3, 0x00 }, { CS42L42_RSENSE_CTL3, 0x00 },
{ CS42L42_TSENSE_CTL, 0x80 }, { CS42L42_TSENSE_CTL, 0x80 },
{ CS42L42_HS_BIAS_CTL, 0xC0 }, { CS42L42_HS_BIAS_CTL, 0xC0 },
{ CS42L42_PWR_CTL1, 0x06 }, { CS42L42_PWR_CTL1, 0x06, 10000 },
{ CS42L42_ADC_OVFL_INT_MASK, 0xff }, { CS42L42_ADC_OVFL_INT_MASK, 0xff },
{ CS42L42_MIXER_INT_MASK, 0xff }, { CS42L42_MIXER_INT_MASK, 0xff },
{ CS42L42_SRC_INT_MASK, 0xff }, { CS42L42_SRC_INT_MASK, 0xff },
@ -473,7 +473,7 @@ struct sub_codec dolphin_cs42l42_1 = {
* Arrays Used for all projects using CS8409 * Arrays Used for all projects using CS8409
******************************************************************************/ ******************************************************************************/
const struct snd_pci_quirk cs8409_fixup_tbl[] = { const struct hda_quirk cs8409_fixup_tbl[] = {
SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE), SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE), SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE),
SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE), SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE),
@ -550,6 +550,10 @@ const struct snd_pci_quirk cs8409_fixup_tbl[] = {
SND_PCI_QUIRK(0x1028, 0x0C50, "Dolphin", CS8409_DOLPHIN), SND_PCI_QUIRK(0x1028, 0x0C50, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C51, "Dolphin", CS8409_DOLPHIN), SND_PCI_QUIRK(0x1028, 0x0C51, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C52, "Dolphin", CS8409_DOLPHIN), SND_PCI_QUIRK(0x1028, 0x0C52, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C73, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C75, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C7D, "Dolphin", CS8409_DOLPHIN),
SND_PCI_QUIRK(0x1028, 0x0C7F, "Dolphin", CS8409_DOLPHIN),
{} /* terminator */ {} /* terminator */
}; };

36
patch_cs8409.c
View file

@ -346,6 +346,11 @@ static int cs8409_i2c_bulk_write(struct sub_codec *scodec, const struct cs8409_i
if (cs8409_i2c_wait_complete(codec) < 0) if (cs8409_i2c_wait_complete(codec) < 0)
goto error; goto error;
/* Certain use cases may require a delay
* after a write operation before proceeding.
*/
if (seq[i].delay)
fsleep(seq[i].delay);
} }
mutex_unlock(&spec->i2c_mux); mutex_unlock(&spec->i2c_mux);
@ -876,7 +881,7 @@ static void cs42l42_resume(struct sub_codec *cs42l42)
{ CS42L42_DET_INT_STATUS2, 0x00 }, { CS42L42_DET_INT_STATUS2, 0x00 },
{ CS42L42_TSRS_PLUG_STATUS, 0x00 }, { CS42L42_TSRS_PLUG_STATUS, 0x00 },
}; };
int fsv_old, fsv_new; unsigned int fsv;
/* Bring CS42L42 out of Reset */ /* Bring CS42L42 out of Reset */
spec->gpio_data = snd_hda_codec_read(codec, CS8409_PIN_AFG, 0, AC_VERB_GET_GPIO_DATA, 0); spec->gpio_data = snd_hda_codec_read(codec, CS8409_PIN_AFG, 0, AC_VERB_GET_GPIO_DATA, 0);
@ -888,18 +893,19 @@ static void cs42l42_resume(struct sub_codec *cs42l42)
/* Initialize CS42L42 companion codec */ /* Initialize CS42L42 companion codec */
cs8409_i2c_bulk_write(cs42l42, cs42l42->init_seq, cs42l42->init_seq_num); cs8409_i2c_bulk_write(cs42l42, cs42l42->init_seq, cs42l42->init_seq_num);
usleep_range(20000, 25000);
/* Clear interrupts, by reading interrupt status registers */ /* Clear interrupts, by reading interrupt status registers */
cs8409_i2c_bulk_read(cs42l42, irq_regs, ARRAY_SIZE(irq_regs)); cs8409_i2c_bulk_read(cs42l42, irq_regs, ARRAY_SIZE(irq_regs));
fsv_old = cs8409_i2c_read(cs42l42, CS42L42_HP_CTL); fsv = cs8409_i2c_read(cs42l42, CS42L42_HP_CTL);
if (cs42l42->full_scale_vol == CS42L42_FULL_SCALE_VOL_0DB) if (cs42l42->full_scale_vol) {
fsv_new = fsv_old & ~CS42L42_FULL_SCALE_VOL_MASK; // Set the full scale volume bit
else fsv |= CS42L42_FULL_SCALE_VOL_MASK;
fsv_new = fsv_old & CS42L42_FULL_SCALE_VOL_MASK; cs8409_i2c_write(cs42l42, CS42L42_HP_CTL, fsv);
if (fsv_new != fsv_old) }
cs8409_i2c_write(cs42l42, CS42L42_HP_CTL, fsv_new); // Unmute analog channels A and B
fsv = (fsv & ~CS42L42_ANA_MUTE_AB);
cs8409_i2c_write(cs42l42, CS42L42_HP_CTL, fsv);
/* we have to explicitly allow unsol event handling even during the /* we have to explicitly allow unsol event handling even during the
* resume phase so that the jack event is processed properly * resume phase so that the jack event is processed properly
@ -909,7 +915,6 @@ static void cs42l42_resume(struct sub_codec *cs42l42)
cs42l42_enable_jack_detect(cs42l42); cs42l42_enable_jack_detect(cs42l42);
} }
#ifdef CONFIG_PM
static void cs42l42_suspend(struct sub_codec *cs42l42) static void cs42l42_suspend(struct sub_codec *cs42l42)
{ {
struct hda_codec *codec = cs42l42->codec; struct hda_codec *codec = cs42l42->codec;
@ -921,7 +926,7 @@ static void cs42l42_suspend(struct sub_codec *cs42l42)
{ CS42L42_MIXER_CHA_VOL, 0x3F }, { CS42L42_MIXER_CHA_VOL, 0x3F },
{ CS42L42_MIXER_ADC_VOL, 0x3F }, { CS42L42_MIXER_ADC_VOL, 0x3F },
{ CS42L42_MIXER_CHB_VOL, 0x3F }, { CS42L42_MIXER_CHB_VOL, 0x3F },
{ CS42L42_HP_CTL, 0x0F }, { CS42L42_HP_CTL, 0x0D },
{ CS42L42_ASP_RX_DAI0_EN, 0x00 }, { CS42L42_ASP_RX_DAI0_EN, 0x00 },
{ CS42L42_ASP_CLK_CFG, 0x00 }, { CS42L42_ASP_CLK_CFG, 0x00 },
{ CS42L42_PWR_CTL1, 0xFE }, { CS42L42_PWR_CTL1, 0xFE },
@ -948,7 +953,6 @@ static void cs42l42_suspend(struct sub_codec *cs42l42)
spec->gpio_data &= ~cs42l42->reset_gpio; spec->gpio_data &= ~cs42l42->reset_gpio;
snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, spec->gpio_data); snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, spec->gpio_data);
} }
#endif
static void cs8409_free(struct hda_codec *codec) static void cs8409_free(struct hda_codec *codec)
{ {
@ -1003,7 +1007,6 @@ static void cs8409_cs42l42_jack_unsol_event(struct hda_codec *codec, unsigned in
} }
} }
#ifdef CONFIG_PM
/* Manage PDREF, when transition to D3hot */ /* Manage PDREF, when transition to D3hot */
static int cs8409_cs42l42_suspend(struct hda_codec *codec) static int cs8409_cs42l42_suspend(struct hda_codec *codec)
{ {
@ -1025,7 +1028,6 @@ static int cs8409_cs42l42_suspend(struct hda_codec *codec)
return 0; return 0;
} }
#endif
/* Vendor specific HW configuration /* Vendor specific HW configuration
* PLL, ASP, I2C, SPI, GPIOs, DMIC etc... * PLL, ASP, I2C, SPI, GPIOs, DMIC etc...
@ -1080,9 +1082,7 @@ static const struct hda_codec_ops cs8409_cs42l42_patch_ops = {
.init = cs8409_init, .init = cs8409_init,
.free = cs8409_free, .free = cs8409_free,
.unsol_event = cs8409_cs42l42_jack_unsol_event, .unsol_event = cs8409_cs42l42_jack_unsol_event,
#ifdef CONFIG_PM
.suspend = cs8409_cs42l42_suspend, .suspend = cs8409_cs42l42_suspend,
#endif
}; };
static int cs8409_cs42l42_exec_verb(struct hdac_device *dev, unsigned int cmd, unsigned int flags, static int cs8409_cs42l42_exec_verb(struct hdac_device *dev, unsigned int cmd, unsigned int flags,
@ -1310,9 +1310,7 @@ static const struct hda_codec_ops cs8409_dolphin_patch_ops = {
.init = cs8409_init, .init = cs8409_init,
.free = cs8409_free, .free = cs8409_free,
.unsol_event = dolphin_jack_unsol_event, .unsol_event = dolphin_jack_unsol_event,
#ifdef CONFIG_PM
.suspend = cs8409_cs42l42_suspend, .suspend = cs8409_cs42l42_suspend,
#endif
}; };
static int dolphin_exec_verb(struct hdac_device *dev, unsigned int cmd, unsigned int flags, static int dolphin_exec_verb(struct hdac_device *dev, unsigned int cmd, unsigned int flags,
@ -1371,6 +1369,7 @@ void dolphin_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int ac
spec->scodecs[CS8409_CODEC1] = &dolphin_cs42l42_1; spec->scodecs[CS8409_CODEC1] = &dolphin_cs42l42_1;
spec->scodecs[CS8409_CODEC1]->codec = codec; spec->scodecs[CS8409_CODEC1]->codec = codec;
spec->num_scodecs = 2; spec->num_scodecs = 2;
spec->gen.suppress_vmaster = 1;
codec->patch_ops = cs8409_dolphin_patch_ops; codec->patch_ops = cs8409_dolphin_patch_ops;
@ -1410,6 +1409,7 @@ void dolphin_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int ac
kctrl = snd_hda_gen_add_kctl(&spec->gen, "Line Out Playback Volume", kctrl = snd_hda_gen_add_kctl(&spec->gen, "Line Out Playback Volume",
&cs42l42_dac_volume_mixer); &cs42l42_dac_volume_mixer);
/* Update Line Out kcontrol template */ /* Update Line Out kcontrol template */
if (kctrl)
kctrl->private_value = HDA_COMPOSE_AMP_VAL_OFS(DOLPHIN_HP_PIN_NID, 3, CS8409_CODEC1, kctrl->private_value = HDA_COMPOSE_AMP_VAL_OFS(DOLPHIN_HP_PIN_NID, 3, CS8409_CODEC1,
HDA_OUTPUT, CS42L42_VOL_DAC) | HDA_AMP_VAL_MIN_MUTE; HDA_OUTPUT, CS42L42_VOL_DAC) | HDA_AMP_VAL_MIN_MUTE;
cs8409_enable_ur(codec, 0); cs8409_enable_ur(codec, 0);

10
patch_cs8409.h
View file

@ -229,9 +229,10 @@ enum cs8409_coefficient_index_registers {
#define CS42L42_I2C_SLEEP_US (2000) #define CS42L42_I2C_SLEEP_US (2000)
#define CS42L42_PDN_TIMEOUT_US (250000) #define CS42L42_PDN_TIMEOUT_US (250000)
#define CS42L42_PDN_SLEEP_US (2000) #define CS42L42_PDN_SLEEP_US (2000)
#define CS42L42_ANA_MUTE_AB (0x0C)
#define CS42L42_FULL_SCALE_VOL_MASK (2) #define CS42L42_FULL_SCALE_VOL_MASK (2)
#define CS42L42_FULL_SCALE_VOL_0DB (1) #define CS42L42_FULL_SCALE_VOL_0DB (0)
#define CS42L42_FULL_SCALE_VOL_MINUS6DB (0) #define CS42L42_FULL_SCALE_VOL_MINUS6DB (1)
/* Dell BULLSEYE / WARLOCK / CYBORG Specific Definitions */ /* Dell BULLSEYE / WARLOCK / CYBORG Specific Definitions */
@ -289,6 +290,7 @@ enum {
struct cs8409_i2c_param { struct cs8409_i2c_param {
unsigned int addr; unsigned int addr;
unsigned int value; unsigned int value;
unsigned int delay;
}; };
struct cs8409_cir_param { struct cs8409_cir_param {
@ -494,17 +496,15 @@ int cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uc
extern const struct hda_pcm_stream cs42l42_48k_pcm_analog_playback; extern const struct hda_pcm_stream cs42l42_48k_pcm_analog_playback;
extern const struct hda_pcm_stream cs42l42_48k_pcm_analog_capture; extern const struct hda_pcm_stream cs42l42_48k_pcm_analog_capture;
extern const struct snd_pci_quirk cs8409_fixup_tbl[]; extern const struct hda_quirk cs8409_fixup_tbl[];
extern const struct hda_model_fixup cs8409_models[]; extern const struct hda_model_fixup cs8409_models[];
extern const struct hda_fixup cs8409_fixups[]; extern const struct hda_fixup cs8409_fixups[];
extern const struct hda_verb cs8409_cs42l42_init_verbs[]; extern const struct hda_verb cs8409_cs42l42_init_verbs[];
extern const struct hda_pintbl cs8409_cs42l42_pincfgs[];
extern const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[]; extern const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[];
extern const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[]; extern const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[];
extern struct sub_codec cs8409_cs42l42_codec; extern struct sub_codec cs8409_cs42l42_codec;
extern const struct hda_verb dolphin_init_verbs[]; extern const struct hda_verb dolphin_init_verbs[];
extern const struct hda_pintbl dolphin_pincfgs[];
extern const struct cs8409_cir_param dolphin_hw_cfg[]; extern const struct cs8409_cir_param dolphin_hw_cfg[];
extern struct sub_codec dolphin_cs42l42_0; extern struct sub_codec dolphin_cs42l42_0;
extern struct sub_codec dolphin_cs42l42_1; extern struct sub_codec dolphin_cs42l42_1;